資料介紹
The HMU16 and HMU17 are high speed, low power CMOS
16-bit x 16-bit multipliers ideal for fast, real time digital signal
processing applications.
The X and Y operands along with their mode controls (TCX
and TCY) have 17-bit input registers. The mode controls
independently specify the operands as either two’s
complement or unsigned magnitude format, thereby allowing
mixed mode multiplication operations.
Two 16-bit output registers are provided to hold the most and
least significant halves of the result (MSP and LSP). For
asynchronous output, these registers may be made
transparent through the use of the Feedthrough Control
(FT).
Additional inputs are provided for format adjustment and
rounding. The Format Adjust control (FA) allows the user to
select either a left shifted 31-bit product or a full 32-bit
product, whereas the round control (RND) provides the
capability of rounding the most significant portion of the
result.
The HMU16 has independent clocks (CLKX, CLKY, CLKL,
CLKM) associated with each of these registers to maximize
throughput and simplify bus interfacing. The HMU17 has
only a single clock input (CLK), but makes use of three
register enables (ENX, ENY and ENP). The ENX and ENY
inputs control the X and Y Input Registers, while ENP
controls both the MSP and LSP Output Registers. This
configuration facilitates the use of the HMU17 for
microprogrammed systems.
The two halves of the product may be routed to a single
16-bit three-state output port via a multiplexer, and in
addition, the LSP is connected to the Y-input port through a
separate three-state buffer.
16-bit x 16-bit multipliers ideal for fast, real time digital signal
processing applications.
The X and Y operands along with their mode controls (TCX
and TCY) have 17-bit input registers. The mode controls
independently specify the operands as either two’s
complement or unsigned magnitude format, thereby allowing
mixed mode multiplication operations.
Two 16-bit output registers are provided to hold the most and
least significant halves of the result (MSP and LSP). For
asynchronous output, these registers may be made
transparent through the use of the Feedthrough Control
(FT).
Additional inputs are provided for format adjustment and
rounding. The Format Adjust control (FA) allows the user to
select either a left shifted 31-bit product or a full 32-bit
product, whereas the round control (RND) provides the
capability of rounding the most significant portion of the
result.
The HMU16 has independent clocks (CLKX, CLKY, CLKL,
CLKM) associated with each of these registers to maximize
throughput and simplify bus interfacing. The HMU17 has
only a single clock input (CLK), but makes use of three
register enables (ENX, ENY and ENP). The ENX and ENY
inputs control the X and Y Input Registers, while ENP
controls both the MSP and LSP Output Registers. This
configuration facilitates the use of the HMU17 for
microprogrammed systems.
The two halves of the product may be routed to a single
16-bit three-state output port via a multiplexer, and in
addition, the LSP is connected to the Y-input port through a
separate three-state buffer.
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