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CD4514B and CD4515B consist of a 4-bit strobed latch and a 4-to-16-line decoder. The latches hold the last input data presented prior to the strobe transition from 1 to 0. Inhibit control allows all outputs to be placed at 0 (CD4514B) or 1 (CD4515B) regardless of the state of the data or strobe inputs.
The decode truth table indicates all combinations of data inputs and appropriate selected outputs.
These devices are similar to industry types MC14514 and MC14515.
The CD4514B and CD4515B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), and 16-lead small-outline packages (M and M96 suffixes).
CD4514B輸出“高”選擇
CD4515B輸出“低”選擇
從Harris Semiconductor獲取數據表。
| ? |
|---|
| Function |
| Technology Family |
| VCC (Min) (V) |
| VCC (Max) (V) |
| Channels (#) |
| Voltage (Nom) (V) |
| F @ Nom Voltage (Max) (Mhz) |
| ICC @ Nom Voltage (Max) (mA) |
| tpd @ Nom Voltage (Max) (ns) |
| Configuration |
| Type |
| IOL (Max) (mA) |
| IOH (Max) (mA) |
| Rating |
| Operating Temperature Range (C) |
| Package Group |
| Package Size: mm2:W x L (PKG) |
| Bits (#) |
| Digital input leakage (Max) (uA) |
| ESD Charged Device Model (kV) |
| ESD HBM (kV) |
| ? |
| CD4514B |
|---|
| Decoder Demultiplexer ? ? |
| CD4000 ? ? |
| 3 ? ? |
| 18 ? ? |
| 4 ? ? |
| 5 10 15 ? ? |
| 8 ? ? |
| 0.3 ? ? |
| 370 ? ? |
| 4:16 ? ? |
| Standard ? ? |
| 1.5 ? ? |
| -1.5 ? ? |
| Catalog ? ? |
| -55 to 125 ? ? |
| SOIC ? ? |
| 24SOIC: 160 mm2: 10.3 x 15.5(SOIC) ? ? |
| 16 ? ? |
| 5 ? ? |
| 0.75 ? ? |
| 2 ? ? |
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