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高穩(wěn)定100KHz時鐘發(fā)生電路,100khz clock generator

454398 ? 2018-09-20 19:18 ? 次閱讀

高穩(wěn)定100KHz時鐘發(fā)生電路,100khz clock generator

關鍵字:高穩(wěn)定100KHz時鐘發(fā)生電路

Build A 100Khz Crystal Calibrator
By N1HFX

There is a great deal of old amateur gear which many amateurs have decided to restore and bring back to life. While much of the early amateur transceivers work just fine they usually lack a digital readout and must rely on analog dials for tuning. The problem of dial calibration is complicated by the non-linear effects of tuning capacitors. This month's circuit is a 100Khz crystal calibrator using an inexpensive microprocessor crystal and CMOS IC's which are readily available at Radio Shack.

The main problem with building a 100Khz oscillator is the unavailability of 100Khz crystals. Even if you find a vendor willing to cut such a crystal for you, plan on paying $20 or more not including shipping charges. The circuit in Figure 1 uses an inexpensive 8Mhz microprocessor crystal which can be easily obtained from most parts suppliers for about $1. Using a 74HCT393 binary counter IC, we can easily divide down the 8 MHz signal from our crystal into 100Khz or almost any frequency we need.

The circuit in Figure 1 uses a couple of NAND gates (74HCT00 IC) for our 8Mhz crystal oscillator. Capacitor C2 actually helps us tune the crystal to the exact frequency, Use any value of C2 from about 22pf to about 82pf to get the oscillator on frequency. In the prototype, 68pf worked fine for most of the crystals tested. For an exact frequency, replace C2 with a 22pf and add a 50pf trimmer capacitor in parallel. By adjusting the 50pf trimmer capacitor, we can easily get the crystal exactly on frequency. The first NAND gate is our oscillator while the second NAND gate acts as a buffer and conditions the signal. This signal is then fed into the clock pulse input of one of the 4 bit binary counters in IC2. By taking the output from the Q3 signal, we have now divided the signal by 16 giving us 500Khz. This signal is now fed into the clock pulse input of the second 4 bit binary counter. In the first counter we tied the MR (clock reset) line to ground. In the second counter, we need the count to reset when we reach a binary five, which will allow us to divide the 500Khz by 5. For this counter, we used the last 2 remaining NAND gates in IC1 to detect the desired value. When we reach the correct reset interval, the MR line goes high resetting the counter to zero and allowing us to effectively divide by 5. The 100Khz output is taken from the Q2 line and is coupled through capacitor C4.

If you prefer, this circuit can be easily changed to a 50Khz calibrator by wiring pins 13 & 14 of IC1 into pins 10 and 8 of IC2. See Figure 2 for details. This arrangement makes the second counter reset at binary 10 which divides the 500Khz by 10 giving us the desired 50Khz.

The HCT series CMOS logic IC's require a 5 volt power supply just like the old TTL logic series. In this circuit we used a 5 volt zener diode, D1, along with resistor R2 to get 12 volts down to 5 volts. Capacitor C3 is used primarily for bypassing the oscillator and must be used in this circuit. If you prefer to power this circuit from a 9 volt battery, then reduce resistor R2 to 220 ohms for best performance.

If you plan to install this circuit inside a transceiver, feed the output directly to the receiver front end. Make certain you have connected it after the TR relay so that the circuit doesn't get zapped by RF from the transmitter side. Also, you will want to install an ON/OFF switch which will interrupt the 12V line going to the circuit. As with all static sensitive CMOS IC's, use special handling precautions and do not leave out those IC sockets.

This circuit has been found to generate accurate birdies at every 100Khz and will be an excellent aid in getting that old rig right on frequency. The accuracy of the 100Khz birdies will depend on how close the 8Mhz oscillator is on frequency. With the difficulty in getting crystals for specific frequencies, this circuit gives new meaning to the words "Divide and Conquer".

要產生100千赫茲頻率的電路,如果采用晶體管搭建的LC震蕩電路,當要求頻率很穩(wěn)定時比較困難,而采用晶體震蕩器則容易實現(xiàn),而低頻率的晶體震蕩器又不容易獲得,下面的電路就能夠將頻率較高的晶體震蕩器通過適當?shù)碾娐份敵鲱l率較低的信號

電路原理簡單,通過IC1的門電路,晶體以及外圍電路組成8M赫茲震蕩器,通過IC2分頻獲得100千赫茲信號。
DE N1HFX


下圖是產生50千赫茲的電路,13腳接上圖的IC2的6腳就可以了。


元件清單

Parts List

C1
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